Field of the Invention
The specification discloses a technique that relates to a die pad, a semiconductor device, and a method for producing the semiconductor device.
Description of the Background Art
In recent years, integrated circuits (ICs) or large-scale integrations (LSIs), for instance, needs to have a high degree of integration. In particular, the semiconductor chips need to be reduced in thickness for their improved stacking capabilities.
Such a reduction in thickness of the semiconductor chips has progressed also in the field of power semiconductors, in order to reduce energy losses (cf. Japanese Patent Application Laid-Open No. 2001-127233). A typical semiconductor chip is bonded, with a bonding material, to the upper surface of a die pad on the upper surface of a lead frame. Alternatively, the semiconductor chip is bonded, with the bonding material, to the upper surface of the die pad on the upper surface of a semiconductor substrate.
When the semiconductor chip is reduced to have a thickness of 200 μm or less for instance, the bonding material extends up to the upper surface of the semiconductor chip to thus possibly cover an electrode on a surface of the semiconductor chip. Further, when the semiconductor chip is reduced to have a thickness of 200 μm or less for instance, the bonding material reaches the upper and lower surfaces of the semiconductor chip to thus possibly cause electrical shorting between the upper and lower surfaces of the semiconductor chip.